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Change the Game: Best Practices in Deploying and Managing HPC Clusters with Intel Xeon Phi


As new research and engineering environments are expanded to include more powerful computers to run increasingly complex computer simulations, the management of these heterogeneous computing environments continues to increase in complexity as well. Integrated solutions that include the Intel® Many Integrated Cores (MIC) architecture can dramatically boost aggregate performance for highly-parallel applications.

In this presentation, NCAR will reveal some of their plans for "Yellowstone" – one of the largest x86-based systems in N. America – located at the NCAR-Wyoming Supercomputer Center and officially opened in October 2012. NCAR Distinguished Software Engineer, Rory Kelly, will describe the selection criteria and best practices in deploying a system of this magnitude.

In addition, Intel Parallel Programming Senior Engineer and published author, James Reinders, will highlight the technology attributes and benefits of Intel® Xeon Phi™ and how this new coprocessor contributes a significant performance impact and positive return on investment for customers.

Nick Werstiuk from IBM will provide details on System x integrated solutions and explain the IBM® Platform Computing™ approach to managing distributed workloads across platforms in a way that will “change the game” for cluster administrators and end users.

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Intel® Xeon Phi™

 

Intel, the Intel logo, Xeon, and Intel Xeon Phi are trademarks of Intel Corporation in the US and/or other countries.

Software Engineer, NCAR
Director and Parallel Programming Evangelist and Senior Engineer, Intel
Product Line Executive, IBM Technical/Platform Computing